HI-8382, HI-8383
January 2001
GENERAL DESCRIPTION
The HI-8382 and HI-8383 bus interface products are silicon
gate CMOS devices designed as a line driver in accordance with
the ARINC 429 bus specifications.
Inputs are provided for clocking and synchronization. These
signals are AND'd with the DATA inputs to enhance system
performance and allow the HI-8382 to be used in a variety of
applications. Both logic and synchronization inputs feature
built-in 2,000V minimum ESD input protection as well as TTL
and CMOS compatibility.
The differential outputs of the HI-8382 are independently
programmable to either the high speed or low speed ARINC 429
output rise and fall time specifications through the use of two
external capacitors. The output voltage swing is also adjustable
by the application of an external voltage to the VREF input. The
HI-8382 has on-chip Zener diodes in series with a fuse to each
differential output protecting the ARINC bus from an overvoltage
failure. The outputs each have a series resistance of 37.5 ohms.
The HI-8383 is identical to the HI-8382 except that the series
resistors are 13 ohms and the overvoltage protection circuitry
has been eliminated.
The HI-8382 and HI-8383 are intended for use where logic
signals must be converted to ARINC 429 levels such as a user
ASIC or the HI-8282 ARINC 429 Serial Transmitter/Dual
Receiver or the HI-6010 ARINC 429 Transmitter/Receiver. Holt
products are readily available for both industrial and military
applications. Please contact the Holt Sales Department for
additional information, including data sheets for the HI-8282 and
HI-6010 products.
PIN CONFIGURATION
(Top View)
4
3
2
1
28
27
26
25
N/C
DATA (A)
N/C
N/C
C
A
N/C
N/C
5
6
7
8
9
10
11
12 13
14 15
16
17
18
CLOCK
N/C
DATA (B)
C
B
N/C
N/C
N/C
HI-8382J
28 - PIN
PLASTIC
PLCC
24
23
22
21
20
19
(See Page 4-46 for additional package pin configurations)
FUNCTION
+
HI-8382
ARINC 429 DIFFERENTIAL LINE DRIVER
FEATURES
!
Low power CMOS
!
TTL and CMOS compatible inputs
!
Programmable output voltage swing
!
Adjustable ARINC rise and fall times
!
Operates at data rates up to 100 Kbits
!
Overvoltage protection
!
Industrial and Military temperature ranges
!
DSCC SMD part number
TRUTH TABLE
SYNC CLOCK DATA(A) DATA(B) AOUT
X
L
H
H
H
H
L
X
H
H
H
H
X
X
L
L
H
H
X
X
L
H
L
H
0V
0V
0V
-V
REF
+V
REF
0V
BOUT COMMENTS
0V
0V
0V
+V
REF
-V
REF
0V
NULL
NULL
NULL
LOW
HIGH
NULL
(DS8382 Rev. A)
HOLT INTEGRATED CIRCUITS
1
01/01
HI-8382, HI-8383
FUNCTIONAL DESCRIPTION
The SYNC and CLOCK inputs establish data synchronization
utilizing two AND gates, one for each data input. Each logic
input, including the power enable (STROBE) input, are
TTL/CMOS compatible. Besides reducing chip current drain,
STROBE also floats each output. However the overvoltage
fuses and diodes of the HI-8382 are not switched out.
Figure 1 illustrates a typical ARINC 429 bus application.
Three power supplies are necessary to operate the HI-8382;
typically +15V, -15V and +5V. The chip also works with ±12V
supplies. The +5V supply can also provide a reference
voltage that determines the output voltage swing. The
differential output voltage swing will equal 2V
REF
. If a value of
V
REF
other than +5V is needed, a separate +5V power supply
is required for pin V
1
.
With the DATA (A) input at a logic high and DATA (B) input at a
logic low, A
OUT
will switch to the +V
REF
rail and B
OUT
will
switch to the -V
REF
rail (ARINC HIGH state). With both data
input signals at a logic low state, the outputs will both switch to
0V (ARINC NULL state).
The driver output impedance, R
OUT
, is nominally 75 ohms.
The rise and fall times of the outputs can be calibrated through
the selection of two external capacitor values that are
connected to the C
A
and C
B
input pins. Typical values for
high-speed operation (100KBPS) are C
A
= C
B
= 75pF and for
low-speed operation (12.5 to 14KBPS) C
A
= C
B
= 500pF.
The driver can be externally powered down by applying a logic
high to the STROBE input pin. If this feature is not being used,
the pin should be tied to ground.
The C
A
and C
B
pins are inputs to unity gain amplifiers.
Therefore they must be allowed to swing to -5V. Provision to
switch capacitors must be done with analog switches that
allow voltages below their ground.
+5V
+15V
V
REF
DATA (A)
V1
SYNC
CLOCK
OUT
+V
INPUTS
DATA (B)
C
C
STROBE
GND
-V
TO ARINC BUS
B
-15V
Figure 1.
ARINC 429 BUS APPLICATION
REF
+V
C
A
DATA (A)
LEVEL SHIFTER
AND SLOPE
CONTROL (A)
CLOCK
OUTPUT
DRIVER (A)
R
OUT
/2
F
A
SYNC
LEVEL SHIFTER
AND SLOPE
CONTROL (B)
F
B
C
L
R
L
DATA (B)
R
OUT
/2
OUTPUT
DRIVER (B)
V
1
STROBE
CURRENT
REGULATOR
OVER VOLTAGE
CLAMPS
Not included on HI-8383
GND
-V
C
B
B
OUT
Figure 2.
FUNCTIONAL BLOCK DIAGRAM
HOLT INTEGRATED CIRCUITS
2
HI-8382, HI-8383
SYMBOL
V
REF
STROBE
SYNC
DATA (A)
C
A
A
OUT
-V
GND
+V
B
OUT
C
B
DATA (B)
CLOCK
V
1
FUNCTION
POWER
INPUT
INPUT
INPUT
INPUT
OUTPUT
POWER
POWER
POWER
OUTPUT
INPUT
INPUT
INPUT
POWER
DESCRIPTION
THE REFERENCE VOLTAGE USED TO DETERMINE THE OUTPUT VOLTAGE SWING
A LOGIC HIGH ON THIS INPUT PLACES THE DRIVER IN POWER DOWN MODE
SYNCHRONIZES DATA INPUTS
DATA INPUT TERMINAL A
CONNECTION FOR DATA (A) SLEW-RATE CAPACITOR
ARINC OUTPUT TERMINAL A
-12V to -15V
0.0V
+12V to +15V
ARINC OUTPUT TERMINAL B
CONNECTION FOR DATA (B) SLEW-RATE CAPACITOR
DATA INPUT TERMINAL B
SYNCHRONIZES DATA INPUTS
+5V ±5%
All Voltages referenced to GND, TA = Operating Temperature Range (unless otherwise specified)
PARAMETER
Differential Voltage
Supply Voltage
SYMBOL
V
DIF
+V
-V
V
1
V
REF
V
IN
CONDITIONS
Voltage between +V and -V terminals
OPERATING RANGE
MAXIMUM
40
UNIT
V
V
V
V
V
V
V
V
+10.8 to +16.5
-10.8 to -16.5
+5 ±10%
For ARINC 429
For Applications other than ARINC
+5 ±5%
0 to 6
+7
6
6
> GND -0.3
< V1 +0.3
Voltage Reference
Input Voltage Range
Output Short-Circuit Duration
Output Overvoltage Protection
Operating Temperature Range
Storage Temperature Range
Lead Temperature
Junction Temperature
Power Dissipation
See Note: 1
See Note: 2
T
A
T
STG
Hi-temp & Military
Industrial
Ceramic & Plastic
Soldering, 10 seconds
T
J
P
D
16-Pin Ceramic DIP
28-Pin Ceramic LCC
28-Pin Plastic PLCC
32-Pin CERQUAD
16-Pin Ceramic DIP
28-Pin Ceramic LCC
28-Pin Plastic PLCC
32-Pin CERQUAD
See Note:
See Note:
See Note:
See Note:
3
3
3
3
-55 to +125
-40 to +85
-65 to +150
+275
+175
1.725
1.120
2.143
1.725
86.5
133.7
70.0
86.5
°C
°C
°C
°C
°C
W
W
W
W
°C/W
°C/W
°C/W
°C/W
Thermal Resistance,
(Junction-to-Ambient)
Ø
JA
Note 1. Heatsinking may be required for Output Short Circuit at +125°C and for 100KBPS at +125°C.
Note 2. The fuses used for Output Overvoltage Protection may be blown by the presence of a voltage at either output that is greater
than ±12.0V with respect to GND. (HI-8382 only)
Note 3. Derate above +25°C, 11.5mW/°C for 16-PIN DIP and 32-PIN CERQUAD, 7.5 mW/°C for 28-PIN LCC, 14.2 mW/°C for 28-PIN PLCC
NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings
only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
HOLT INTEGRATED CIRCUITS
3
HI-8382, HI-8383
+V = +15V, -V = -15V, V
1
= V
REF
= +5.0V, T
A
= Operating Temperature Range (unless otherwise specified).
PARAMETER
Supply Current +V (Operating)
Supply Current -V (Operating)
Supply Current
V
1
(Operating)
Supply Current
V
REF
(Operating)
Supply Current +V (Power Down)
Supply Current -V (Power Down)
Supply Current +V (During Short Circuit Test)
Supply Current -V (During Short Circuit Test)
Output Short Circuit Current (Output High)
Output Short Circuit Current (Output Low)
Input Current (Input High)
Input Current (Input Low)
Input Voltage High
Input Voltage Low
Output Voltage High (Output to Ground)
Output Voltage Low (Output to Ground)
Output Voltage Null
Input Capacitance
SYMBOL
I
CCOP
(+V)
I
CCOP
(-V)
I
CCOP
(
V
1
)
I
CCOP
(
V
REF
)
I
CCPD
(+V)
I
CCPD
(-V)
I
SC
(+V)
I
SC
(-V)
I
OHSC
I
OLSC
I
IH
I
IL
V
IH
V
IL
V
OH
V
OL
V
NULL
C
IN
No Load
No Load
No Load
No Load
CONDITION
(0 - 100KBPS)
(0 - 100KBPS)
(0 - 100KBPS)
(0 - 100KBPS)
MIN
-11
TYP
MAX UNITS
+11
500
500
475
mA
mA
µA
µA
uA
uA
150
mA
mA
-80
mA
mA
1.0
-1.0
µA
µA
V
0.5
V
V
V
mV
pF
+V
REF
+.
25
-V
REF
+.
25
+250
STROBE = HIGH
STROBE = HIGH
Short to Ground
Short to Ground
Short to Ground
Short to Ground
(See Note: 1)
(See Note: 1)
-150
+80
-475
V
MIN
=0 (See Note: 2)
V
MIN
=0 (See Note: 2)
2.0
No Load
No Load
No Load
See Note 1
(0 -100KBPS)
(0 -100KBPS)
(0-100KBPS)
+V
REF
-.
25
-V
REF
-.
25
-250
15
Note 1. Not tested, but characterized at initial device design and after major process and/or design change which affects this parameter.
Note 2. Interchangeability of force and sense is acceptable.
+V = +15V, -V = -15V, V
1
= V
REF
= +5.0V, T
A
= Operating Temperature Range (unless otherwise specified).
PARAMETER
Rise Time (
A
OUT
,
B
OUT
)
Fall Time (
A
OUT
,
B
OUT
)
Propagtion Delay Input to Output
Propagtion Delay Input to Output
SYMBOL
t
R
t
F
t
PLH
t
PHL
CONDITION
C
A
=
C
B
= 75pF
C
A
=
C
B
= 75pF
C
A
=
C
B
= 75pF
C
A
=
C
B
= 75pF
See Figure 3.
See Figure 3.
See Figure 3.
See Figure 3.
MIN
1.0
1.0
TYP
MAX UNITS
2.0
2.0
3.0
3.0
2.0V
0.5V
µs
µs
µs
µs
DATA (A) 0V
DATA (B) 0V
V
REF
50%
50%
ADJUST
BY
C
A
2.0V
0.5V
+4.75V to +5.25V
A
OUT
0V
ADJUST
BY
C
A
-V
REF
50%
50%
-4.75V to -5.25V
ADJUST
BY
C
B
ADJUST
BY
C
B
t
PHL
+V
REF
+4.75V to +5.25V
-4.75V to -5.25V
HIGH
NULL
B
OUT
0V
-V
REF
t
PLH
t
R
DIFFERENTIAL
OUTPUT 0V
2V
REF
+9.5V to +10.5V
(
A
OUT -
B
OUT
)
NOTE: OUTPUTS UNLOADED
t
F
-2V
RE
LOW
-9.5V to -10.5V
Figure 3.
SWITCHING WAVEFORMS
HOLT INTEGRATED CIRCUITS
4
HI-8382, HI-8383
HI-8382 PACKAGE THERMAL CHARACTERISTICS
M AXIM U M ARINC LOAD
PACKAGE STYLE
28 Le a d PLCC
16 Le a d Ceramic SB DIP
1
7
ARINC 429
DATA RATE
Low Speed
3
SUPPLY CURRENT (mA)
2
Ta = 25 C
o
JUNCTION TEMP, Tj (°C)
Ta = 25
o
C
Ta = 85
o
C
Ta=125
o
C
Ta = 85 C
o
Ta=125 C
o
17.6
25.4
17.9
25.8
17.2
24.5
17.4
24.8
17.0
24.2
17.1
24.4
48
56
41
47
107
110
103
112
142
150
145
147
High Speed
4
Low Speed
High Speed
A
OUT
and B
OUT
Shorted to Ground
5 , 6, 7
PACKAGE STYLE
28 Le a d PLCC
16 Le a d Ceramic SB DIP
1
ARINC 429
DATA RATE
Low Speed
3
SUPPLY CURRENT (mA)
2
Ta = 25
o
C
Ta = 85
o
C
Ta=125
o
C
JUNCTION TEMP, Tj (°C)
Ta = 25
o
C
Ta = 85
o
C
Ta=125
o
C
60.1
63.1
62.1
64.0
55.7
56.3
56.2
56.2
52.4
52.3
53.0
52.2
110
100
90
86
157
150
145
144
194
182
180
176
High Speed
4
Low Speed
High Speed
Notes:
1. All data taken in still air on devices soldered to a single layer copper PCB (3" X 4.5" X .062").
2. At 100% duty cycle, 15V power supplies. For 12V power supplies multiply all tabulated values by 0.8.
3. Low Speed: Data Rate = 12.5 Kbps, Load: R = 400 Ohms, C = 30 nF.
4. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30
as this is considered unrealistic for high speed operation.
5. Similar results would be obtained with A
OUT
shorted to B
OUT
.
6. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended.
7. Data will vary depending on air flow and the method of heat sinking employed.
HI-8383 part numbers identical except the SMD version is not available.
NUMBER
HI-8382C
HI-8382CT
HI-8382CM-01
HI-8382CM-03*
HI-8382J
HI-8382JT
HI-8382S
HI-8382ST
HI-8382SM-01
HI-8382U
HI-8382UT
DESCRIPTION
16 PIN CERAMIC SIDE BRAZED DIP
16 PIN CERAMIC SIDE BRAZED DIP
16 PIN CERAMIC SIDE BRAZED DIP
16 PIN CERAMIC SIDE BRAZED DIP
28 PIN PLASTIC J -LEAD PLCC
28 PIN PLASTIC J -LEAD PLCC
28 PIN CERAMIC LEADLESS CHIP CARRIER
28 PIN CERAMIC LEADLESS CHIP CARRIER
28 PIN CERAMIC LEADLESS CHIP CARRIER
32 PIN J-LEAD CERQUAD
32 PIN J-LEAD CERQUAD
RANGE
-40°C TO +85°C
-55°C TO +125°C
-55°C TO +125°C
-55°C TO +125°C
-40°C TO +85°C
-55°C TO +125°C
-40°C TO +85°C
-55°C TO +125°C
-55°C TO +125°C
-40°C TO +85°C
-55°C TO +125°C
FLOW
I
T
M
DSCC
I
T
I
T
M
I
T
IN
NO
NO
YES
YES
NO
NO
NO
NO
YES
NO
NO
FINISH
GOLD
GOLD
SOLDER
SOLDER
SOLDER
SOLDER
GOLD
GOLD
SOLDER
SOLDER
SOLDER
HOLT INTEGRATED CIRCUITS
5
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